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 HD74HC4024
7-stage Binary Counter
REJ03D0325-0300 Rev.3.00 Mar 30, 2006
Description
The HD74HC4024 is a 7-stage counter. This device is incremented on the falling edge (negative transition) of the input clock, and all its output is reset to a low level by applying a logical high on its reset input.
Features
* * * * * * High Speed Operation: tpd (Clock to Q1) = 14 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 A max Low Quiescent Supply Current: ICC (static) = 4 A max (Ta = 25C) Ordering Information
Part Name HD74HC4024P HD74HC4024FPEL Package Type DILP-14 pin SOP-14 pin (JEITA) Package Code (Previous Code) PRDP0014AB-B (DP-14AV) Package Abbreviation P -- EL (2,000 pcs/reel) EL (2,500 pcs/reel) Taping Abbreviation (Quantity)
PRSP0014DF-B FP (FP-14DAV) PRSP0014DE-A HD74HC4024RPEL SOP-14 pin (JEDEC) RP (FP-14DNV) Note: Please consult the sales office for the above package availability.
Function Table
Clock L L H H Reset L H L H L H L H Outputs State No change All outputs are low No change All outputs are low No change All outputs are low Advance to next state All outputs are low
Rev.3.00 Mar 30, 2006 page 1 of 6
HD74HC4024
Pin Arrangement
Clock Reset Q7 Q6 Q5 Q4 GND
1 2 3 4 5 6 7 (Top view) R Q7 Q6 Q5 Q4 Q3 C
14 13 Q1 Q2 12 11 10 9 8
VCC NC Q1 Q2 NC Q3 NC
Block Diagram
D
D
D
D
Clock
C
Q
C
Q
C
Q
C
Q
R
R
R
R
Reset
Q1
Q2
Q6
Q7
Rev.3.00 Mar 30, 2006 page 2 of 6
HD74HC4024
Absolute Maximum Ratings
Item Supply voltage range Input / Output voltage Input / Output diode current Output current VCC, GND current Power dissipation Storage temperature Symbol VCC VIN, VOUT IIK, IOK IOUT ICC or IGND PT Tstg Ratings -0.5 to 7.0 -0.5 to VCC +0.5 20 25 50 500 -65 to +150 Unit V V mA mA mA mW C
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time.
Recommended Operating Conditions
Item Supply voltage Input / Output voltage Operating temperature Input rise / fall time*1 Note: Symbol VCC VIN, VOUT Ta tr, tf Ratings 2 to 6 0 to VCC -40 to 85 0 to 1000 0 to 500 0 to 400 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. Unit V V C ns Conditions
VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V
DC Characteristics
Item Input voltage Symbol VCC (V) VIH 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 6.0 6.0 Ta = 25C Min 1.5 3.15 4.2 -- -- -- 1.9 4.4 5.9 4.18 5.68 -- -- -- -- -- -- -- Typ -- -- -- -- -- -- 2.0 4.5 6.0 -- -- 0.0 0.0 0.0 -- -- -- -- Max -- -- -- 0.5 1.35 1.8 -- -- -- -- -- 0.1 0.1 0.1 0.26 0.26 0.1 4.0 Ta = -40 to +85C Min Max 1.5 -- 3.15 -- 4.2 -- -- 0.5 -- 1.35 -- 1.8 1.9 -- 4.4 -- 5.9 -- 4.13 -- 5.63 -- -- -- -- -- -- -- -- 0.1 0.1 0.1 0.33 0.33 1.0 40 Unit V Test Conditions
VIL
V
Output voltage
VOH
V
Vin = VIH or VIL IOH = -20 A
IOH = -4 mA IOH = -5.2 mA V Vin = VIH or VIL IOL = 20 A
VOL
Input current Quiescent supply current
Iin ICC
A A
IOL = 4 mA IOL = 5.2 mA Vin = VCC or GND Vin = VCC or GND, Iout = 0 A
Rev.3.00 Mar 30, 2006 page 3 of 6
HD74HC4024
AC Characteristics
(CL = 50 pF, Input tr = tf = 6 ns)
Item Maximum clock frequency Symbol VCC (V) fmax 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 -- Min -- -- -- -- -- -- -- -- -- -- -- -- 100 20 17 80 16 14 -- -- -- -- Ta = 25C Typ -- -- -- -- 14 -- -- 14 -- -- 13 -- -- 0 -- -- 4 -- -- 5 -- 5 Max 5 25 29 185 37 31 185 37 31 185 37 31 -- -- -- -- -- -- 75 15 13 10 Ta = -40 to +85C Min Max -- 4 -- 20 -- 24 -- 230 -- 46 -- 39 -- 230 -- 46 -- 39 -- 230 -- 46 -- 39 125 -- 25 -- 21 -- 100 20 17 -- -- -- -- -- -- -- 95 19 16 10 Unit MHz Test Conditions
Propagation delay time
tPLH
ns
Clock to Q1
tPHL
ns
Clock to Q1
tPHL
ns
Reset to output
Removal time
trem
ns
Pulse width
tw
ns
Output rise/fall time
tTLH tTHL Cin
ns
Input capacitance
pF
Test Circuit
VCC VCC
Clock
See Function Table
Input Pulse Generator Zout = 50 Input Pulse Generator Zout = 50
Output Q1 to Q7 CL = 50 pF Reset
Note : 1. CL includes probe and jig capacitance.
Rev.3.00 Mar 30, 2006 page 4 of 6
HD74HC4024
Package Dimensions
JEITA Package Code P-DIP14-6.3x19.2-2.54 RENESAS Code PRDP0014AB-B Previous Code DP-14AV MASS[Typ.] 0.97g
D
14
8
1 b3
7
Z
A
E
Reference Symbol
A1
Dimension in Millimeters
Min
e
bp
e1
c
( Ni/Pd/Au plating )
e1 D E A A1 bp b3 c e Z L
Nom Max 7.62 19.2 20.32 6.3 7.4 5.06
L
0.51 0.40 0.48 0.56 1.30 0.19 0.25 0.31 0 15 2.29 2.54 2.79 2.39 2.54
JEITA Package Code P-SOP14-3.95x8.65-1.27
RENESAS Code PRSP0014DE-A
Previous Code FP-14DNV
MASS[Typ.] 0.13g
*1
D 8
F
14
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
bp
Index mark
HE
E
*2
Terminal cross section ( Ni/Pd/Au plating )
1 Z e
*3
c
Reference Dimension in Millimeters Symbol
Min
7 bp x M L1
A1
L
y
Detail F
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
Nom Max 8.65 9.05 3.95
0.10 0.14 0.25 1.75 0.34 0.40 0.46 0.15 0.20 0.25 0 8 5.80 6.10 6.20 1.27 0.25 0.15 0.635 0.40 0.60 1.27 1.08
Rev.3.00 Mar 30, 2006 page 5 of 6
A
HD74HC4024
JEITA Package Code P-SOP14-5.5x10.06-1.27 RENESAS Code PRSP0014DF-B Previous Code FP-14DAV MASS[Typ.] 0.23g
*1
D 8
F
14
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
bp
HE
E
Index mark
*2
Terminal cross section ( Ni/Pd/Au plating )
1 Z e
*3
7 bp x M L1
Reference Dimension in Millimeters Symbol
c
A1
y
L
Detail F
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
Min Nom Max 10.06 10.5 5.50
0.00 0.10 0.20 2.20 0.34 0.40 0.46 0.15 0.20 0.25 0 8 7.50 7.80 8.00 1.27 0.12 0.15 1.42 0.50 0.70 0.90 1.15
Rev.3.00 Mar 30, 2006 page 6 of 6
A
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
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1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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Colophon .6.0


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